1. Field of the Invention
The present invention generally relates to a method for forming a semiconductor device, and more particularly, to a method for forming an isolation structure for a high voltage device.
2. Description of the Prior Art
Isolation is provided in a semiconductor between transistors on a semiconductor chip to prevent unwanted electrical connections therebetween.
Local oxidation of silicon (LOCOS) has long been the conventional process for fabricating isolation, and it has the advantage of being both relatively inexpensive and capable of providing isolation over wide areas of a chip. LOCOS has several disadvantages, however, among them the formation of a bird's beak that increases the horizontal space of the isolation, reducing the density of devices on a chip.
Because of its more vertical sidewalls and more planar surface, trench isolation provides significant advantage over LOCOS in the quest for providing high density integrated circuits. Trench isolation schemes are therefore finding increasing use in semiconductor processing.
On the development of ultra-large-scale-integrated (ULSI), layout rule will shrink and the application of product is going to invent on multi-chip of integrated function. The prior high-voltage device is implemented by LOCOS process, as shown in FIG. 1, while in deep submicron field is trench oxide. However, integrated high voltage device requires another method to isolate therebetween.